?001 fairchild semiconductor corporation BUZ72A rev. b BUZ72A 9a, 100v, 0.250 ohm, n-channel power mosfet this is an n-channel enhancement mode silicon gate power ?ld effect transistor designed for applications such as switching regulators, switching converters, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. this type can be operated directly from integrated circuits. formerly developmental type ta17401. features 9a, 100v ? ds(on) = 0.250 ? soa is power dissipation limited nanosecond switching speeds linear transfer characteristics high input impedance majority carrier device related literature - tb334 ?uidelines for soldering surface mount components to pc boards symbol packaging jedec to-220ab ordering information part number package brand BUZ72A to-220ab BUZ72A note: when ordering, use the entire part number. g d s gate drain (flange) source drain data sheet december 2001
?001 fairchild semiconductor corporation BUZ72A rev. b absolute maximum ratings t c = 25 o c, unless otherwise speci?d BUZ72A units drain to source breakdown voltage (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v ds 100 v drain to gate voltage (r gs = 20k ?) (note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v dgr 100 v continuous drain current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . i d 9a pulsed drain current (note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .i dm 36 a gate to source voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v gs 20 v maximum power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p d 40 w linear derating factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.32 w/ o c operating and storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .t j , t stg -55 to 150 o c din humidity category - din 40040 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .e iec climatic category - din iec 68-1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55/150/56 maximum temperature for soldering leads at 0.063in (1.6mm) from case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t l package body for 10s, see techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . t pkg 300 260 o c o c caution: stresses above those listed in ?bsolute maximum ratings may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this speci?ation is not implied. note: 1. t j = 25 o c to 125 o c. electrical speci?ations t c = 25 o c, unless otherwise speci?d parameter symbol test conditions min typ max units drain to source breakdown voltage bv dss i d = 250 a, v gs = 0v 100 - - v gate to threshold voltage v gs(th) v gs = v ds , i d = 1ma (figure 9) 2.1 3 4 v zero gate voltage drain current i dss t j = 25 o c, v ds = 100v, v gs = 0v - 20 250 a t j = 125 o c, v ds = 100v, v gs = 0v - 100 1000 a gate to source leakage current i gss v gs = 20v, v ds = 0v - 10 100 na drain to source on resistance (note 2) r ds(on) i d = 5a, v gs = 10v (figure 8) - 0.23 0.250 ? forward transconductance (note 2) g fs v ds = 25v, i d = 5a (figure 11) 2.7 3.8 - s turn-on delay time t d(on) v cc = 30v, i d 2.9a, v gs = 10v, r gs = 50 ?, r l = 10 ? -2030 ns rise time t r -4570 ns turn-off delay time t d(off) -7090 ns fall time t f -5570 ns input capacitance c iss v ds = 25v, v gs = 0v, f = 1mhz (figure 10) - 450 600 pf output capacitance c oss - 150 240 pf reverse transfer capacitance c rss - 80 130 pf thermal resistance junction to case r jc 3.1 o c/w thermal resistance junction to ambient r ja 75 o c/w source to drain diode speci?ations parameter symbol test conditions min typ max units continuous source to drain current i sd t c = 25 o c--9a pulsed source to drain current i sdm - - 36 a source to drain diode voltage v sd t j = 25 o c, i sd = 18a, v gs = 0v, (figure 12) - 1.5 2 v reverse recovery time t rr t j = 25 o c, i sd = 9a, di sd /dt = 100a/ s, v r = 30v - 170 - ns reverse recovery charge q rr - 0.30 - c notes: 2. pulse test: pulse width 300 s, duty cycle 2%. 3. repetitive rating: pulse width limited by maximum junction temperature. see transient thermal impedance curve (figure 3). BUZ72A
?001 fairchild semiconductor corporation BUZ72A rev. b typical performance curves unless otherwise speci?d figure 1. normalized power dissipation vs case temperature figure 2. maximum continuous drain current vs case temperature figure 3. maximum transient thermal impedance figure 4. forward bias safe operating area figure 5. output characteristics t c , case temperature ( o c) power dissipation multiplier 0 0 25 50 75 100 150 0.2 0.4 0.6 0.8 1.0 1.2 125 8 6 4 2 0 0 50 100 150 t c , case temperature ( o c) i d , drain current (a) v gs 10v 12 10 10 -5 10 -4 10 -3 10 -2 10 -1 10 0 10 1 t, rectangular pulse duration (s) 0.1 0.02 0.2 0.5 0.01 0.05 0 z jc, transient thermal impedance 1 0.1 0.01 p dm notes: duty factor: d = t 1 /t 2 peak t j = p dm x z jc + t c t 1 t 2 v ds , drain to source voltage (v) 10 1 i d , drain current (a) 10 2 10 2 10 0 10 1 10 0 10 -1 10 3 10 s 1.5 s 1ms 10ms 100 s dc 100ms t j = max rated, t c = 25 o c, single pulse operation in this area may be limited by r ds(on) 20 15 10 0 04 812 v ds , drain to source voltage (v) i d , drain current (a) 5 pulse duration = 80 s v gs = 20v 10v p d = 40w v gs = 6.0v v gs = 5.5v v gs = 5.0v v gs = 4.5v v gs = 4.0v v gs = 6.5v v gs = 7.0v v gs = 7.5v v gs = 8.0v duty cycle = 0.5% max t j = 25 o c BUZ72A
?001 fairchild semiconductor corporation BUZ72A rev. b figure 6. transfer characteristics figure 7. drain to source on resistance vs gate voltage and drain current figure 8. drain to source on resistance vs junction temperature figure 9. gate threshold voltage vs junction temperature figure 10. capacitance vs drain to source voltage figure 11. transconductance vs drain current typical performance curves unless otherwise speci?d (continued) 25 20 15 10 5 0 0510 i ds(on) , drain to source current (a) v gs , gate to source voltage (v) pulse duration = 80 s v ds = 25v, t j = 25 o c duty cycle = 0.5% max 01020 15 0.6 0.4 0.2 0 i d , drain current (a) r ds(on), drain to source on resistance ( ? ) 0.8 5 v gs = 5v 5.5v 6v 6.5v 7v 7.5v 8v 9v 10v 20v pulse duration = 80 s duty cycle = 0.5% max -50 0 50 100 150 r ds(on) , drain to source 0.8 0.6 0.4 0.2 0 t j , junction temperature ( o c) i d = 5a v gs = 10v on resistance ( ? ) pulse duration = 80 s duty cycle = 0.5% max -50 0 50 100 150 v gs(th) , gate threshold voltage (v) 4 3 2 1 0 t j , junction temperature ( o c) v ds = v gs , i d = 1ma 0 10203040 v ds , drain to source voltage (v) 10 1 10 0 10 -1 10 -2 c, capacitance (nf) c iss c oss c rss v gs = 0, f = 1mhz c iss = c gs + c gd c rss = c gd c oss = c ds + c gs 5 4 3 2 1 0 0 5 10 15 i d , drain current (a) g fs , transconductance (s) pulse duration = 80 s v ds = 25v, t j = 25 o c duty cycle = 0.5% max BUZ72A
?001 fairchild semiconductor corporation BUZ72A rev. b figure 12. source to drain diode voltage figure 13. gate to source voltage vs gate charge test circuits and waveforms figure 14. switching time test circuit figure 15. resistive switching waveforms figure 16. gate charge test circuit figure 17. gate charge waveforms typical performance curves unless otherwise speci?d (continued) 0 0.5 1.0 1.5 2.0 v sd , source to drain voltage (v) 10 2 10 1 10 0 10 -1 i sd , source to drain current (a) pulse duration = 80 s t j = 150 o c t j = 25 o c 2.5 3.0 duty cycle = 0.5% max 15 10 5 0 0510 q g , gate charge (nc) v gs , gate to source voltage (v) i d = 14a v ds = 20v v ds = 80v 15 20 25 v gs r l r g dut + - v dd t on t d(on) t r 90% 10% v ds 90% 10% t f t d(off) t off 90% 50% 50% 10% pulse width v gs 0 0 0.3 f 12v battery 50k ? v ds s dut d g i g(ref) 0 (isolated v ds 0.2 f current regulator i d current sampling i g current sampling supply) resistor resistor same type as dut q g(tot) q gd q gs v ds 0 v gs v dd i g(ref) 0 BUZ72A
disclaimer fairchild semiconductor reserves the right to make changes without further notice t o any products herein t o improve reliability , function or design. fairchild does not assume any liability arising out of the applica tion or use of any product or circuit described herein; neither does it convey any license under its p a tent rights, nor the rights of others. trademarks the following are registered and unregistered trademarks fairchild semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. life support policy fairchild?s products are not authorized for use as critical components in life support devices or systems without the express written approval of fairchild semiconductor corporation. as used herein: 1. life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. 2. a critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. product status definitions definition of terms datasheet identification product status definition advance information preliminary no identification needed obsolete this datasheet contains the design specifications for product development. specifications may change in any manner without notice. this datasheet contains preliminary data, and supplementary data will be published at a later date. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains final specifications. fairchild semiconductor reserves the right to make changes at any time without notice in order to improve design. this datasheet contains specifications on a product that has been discontinued by fairchild semiconductor. the datasheet is printed for reference information only. formative or in design first production full production not in production optologic? optoplanar? pacman? pop? power247? powertrench qfet? qs? qt optoelectronics? quiet series? silent switcher fast fastr? frfet? globaloptoisolator? gto? hisec? isoplanar? littlefet? microfet? micropak? microwire? rev. h4 a acex? bottomless? coolfet? crossvolt ? densetrench? dome? ecospark? e 2 cmos tm ensigna tm fact? fact quiet series? smart start? star*power? stealth? supersot?-3 supersot?-6 supersot?-8 syncfet? tinylogic? trutranslation? uhc? ultrafet a a a star*power is used under license vcx?
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